Published November 24, 2017 | Version v1
Journal article

Analysis of noise generation and electric conduction at grain boundaries in CVD-grown MoS2 field effect transistors

  • 1. Department of Physics and Astronomy, and Institute of Applied Physics, Seoul National University, Seoul 08826 (Korea, Republic of)

Description

Grain boundaries in a chemical vapour deposition (CVD)-grown monolayer of MoS2 induce significant effects on the electrical and low frequency noise characteristics of the MoS2. Here, we investigated the electrical properties and noise characteristics of MoS2 field effect transistors (FETs) made with CVD-grown monolayer MoS2. The electrical and noise characteristics of MoS2 FETs were analysed and compared for the MoS2 channel layers with and without grain boundaries. The grain boundary in the CVD-grown MoS2 FETs can be the dominant noise source, and dependence of the extracted Hooge parameters on the gate voltage indicated the domination of the correlated number-mobility fluctuation at the grain boundaries. The percolative noise characteristics of the single grain regions of MoS2 were concealed by the noise generated at the grain boundary. This study can enhance understanding of the electrical transport hindrance and significant noise generation by trapped charges at grain boundaries of the CVD-grown MoS2 devices. (letter)

Availability note (English)

Available from http://dx.doi.org/10.1088/1361-6528/aa9236

Additional details

Identifiers

Publishing Information

Journal Title
Nanotechnology (Print)
Journal Volume
28
Journal Issue
47
Journal Page Range
[7 p.]
ISSN
0957-4484