A fully integrated multi-standard frequency synthesizer for GNSS receivers with cellular network positioning capability

A fully integrated hybrid integer/fractional frequency synthesizer is presented. With a single multiband voltage-controlled-oscillator (VCO), the frequency synthesizer can support GPS, Galileo, Compass and TD-SCDMA standards. Design is carefully performed to trade off power, die area and phase noise performance. By reconfiguring between the integer mode and fractional mode, different frequency resolution requirements and a constant loop bandwidth for each standard can be achieved simultaneously. Moreover, a long sequence length, reduced hardware complexity multi-stage-noise-shaping (MASH) Δ−Σ modulator is employed to reduce fractional spur in the fractional mode. Fabricated in a 0.18 μm CMOS technology, the frequency synthesizer occupies an active area of 1.48 mm2 and draws a current of 13.4–16.2 mA from a 1.8 V power supply. The measured phase noise is lower than −80 dBc/Hz at 100 kHz offset and −113 to −124 dBc/Hz at 1 MHz offset respectively, while the measured reference spur is −71 dBc in integer mode and the fractional spur is −65 dBc in fractional mode. (semiconductor integrated circuits)