Published January 2017 | Version v1
Journal article

Analog front-end design of the STS/MUCH-XYTER2—full size prototype ASIC for the CBM experiment

  • 1. AGH University of Science and Technology, Av. A. Mickiewicza 30, 30-059 Cracow (Poland)

Description

The design of the analog front-end of the STS/MUCH-XYTER2 ASIC, a full-size prototype chip for the Silicon Tracking System (STS, based on double-sided silicon strip sensors) and Muon Chamber (MUCH, based on gas sensors) detectors is presented. The ASIC contains 128 charge processing channels, each built of a charge sensitive amplifier, a polarity selection circuit and two pulse shaping amplifiers forming two parallel signal paths. The first path is used for timing measurement with a fast discriminator. The second path allows low-noise amplitude measurement with a 5-bit continuous-time flash ADC. Different operating conditions and constraints posed by two target detectors' applications require front-end electronics flexibility to meet extended system-wise requirements. The presented circuit implements switchable shaper peaking time, gain switching and trimming, input amplifier pulsed reset circuit, fail-safe measures. The power consumption is scalable (for the STS and the MUCH modes), but limited to 10 mW/channel.

Availability note (English)

Available from http://dx.doi.org/10.1088/1748-0221/12/01/C01053

Additional details

Publishing Information

Journal Title
Journal of Instrumentation
Journal Volume
12
Journal Issue
01
Journal Page Range
p. C01053
ISSN
1748-0221