Published January 2008 | Version v1
Journal article Metadata-only

Data buffering scheme of PMT readout electronics of Daya Bay Reactor Neutrino Experiment

Creators

  • 1. Chinese Academy of Sciences, Beijing (China). Graduate Univ.
  • 2. Chinese Academy of Sciences, Beijing (China). Inst. of High Energy Physics

Description

Two data buffering schemes are discussed in detail for PMT readout electronics of Daya Bay Reactor Neutrino Experiment. The first scheme is simple pipeline buffer scheme and cost a lot of FPGA resources. The corresponding high price of FPGA is not affordable. For the method of two-level buffers, data out from ADC are firstly suppressed. Data volume is decreased and FPGA resources are greatly saved. This is a feasible low cost readout scheme. Therefore two-level-buffer scheme is our reasonable option. (authors)

Additional details

Publishing Information

Journal Title
Nuclear Electronics and Detection Technology
Journal Volume
28
Journal Issue
1
Journal Page Range
p. 202-205
ISSN
0258-0934

INIS

Country of Publication
China
Country of Input or Organization
China
INIS RN
41064753
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; S21: SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS;
Descriptors DEI
ARRAY PROCESSORS; COMPARATIVE EVALUATIONS; COMPRESSION; DAYA BAY-1 REACTOR; GATING CIRCUITS; MEMORY MANAGEMENT; NEUTRINO DETECTION; NUCLEAR POWER PLANTS; PHOTOMULTIPLIERS; PROGRAMMING; READOUT SYSTEMS
Descriptors DEC
COMPUTERS; DATA PROCESSING; DETECTION; DIGITAL COMPUTERS; ELECTRONIC CIRCUITS; ENRICHED URANIUM REACTORS; EVALUATION; NUCLEAR FACILITIES; PHOTOTUBES; POWER PLANTS; POWER REACTORS; PROCESSING; PWR TYPE REACTORS; RADIATION DETECTION; REACTORS; THERMAL POWER PLANTS; THERMAL REACTORS; WATER COOLED REACTORS; WATER MODERATED REACTORS

Optional Information

Notes
3 figs.