Fast readout for pixel devices

Readout electronics used in modern pixel radiation detectors that have been designed and constructed for high-energy physics are commonly built using general architectures that require a serial scan of the matrix. Experiments use bi-dimensional matrices of sensitive elements located on a silicon die. These are read out via other integrated circuits bump bonded over the sensor dies. The speed of the readout electronics can significantly increase the overall performance of the system, and so here a novel form of readout architecture is described for pixel devices that has been investigated in terms of speed particularly suited for large monolithic, low-pitch pixel circuits. The idea is to have a small simple structure that may be expanded to large matrices without affecting layout complexity and maintaining a reasonably high readout speed. This solution could be applied to devices for applications in physics and to general-purpose pixel detectors whenever on-line fast data sparsification is required