Published 2015 | Version v1
Miscellaneous

Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

  • 1. School of Computer Science and Technology, Northwestern Polytechnical University, Xi'an (China)

Description

Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e- (rms) at zero farad for a power consumption of 8 mW per channel. The linearity error is lower than 1% and the overall gain of the readout channel is 165 V/pC. The crosstalk between the channels is less than 3%. By connecting the readout ASIC to a CdZnTe detector, we obtained a γ-ray spectrum, the energy resolution is 5.1% at the 59.5-keV line of 241Am source. (authors)

Additional details

Publishing Information

Imprint Pagination
5 p.
Report number
ANIMMA--2015-IO-77

Conference

Title
4. International Conference on Advancements in Nuclear Instrumentation Measurement Methods and their Applications
Acronym
ANIMMA 2015
Dates
20-24 Apr 2015
Place
Lisboa (Portugal)