Published January 1983
| Version v1
Journal article
Ion implantation of GaAs integrated circuits
- 1. British Telecom Research Labs., Ipswich
Description
The conditions required for the fabrication of low pinch-off voltage MESFETs by ion implantation have been established. Calculation of the device characteristics from measured carrier concentration profiles has shown that a Vp of -1.5V is best achieved using low implant energies together with ion doses of 2 x 1012 cm-2. Characterisation of the implant and annealing conditions has enabled the implanted dose to be corrected for the activation after annealing. Measurement of the processed devices has shown the variation in saturation current to be as low as 3 mA over 75% of the wafer area, showing suitability for use in logic circuit fabrication. (author)
Additional details
Publishing Information
- Journal Title
- Solid-State Electron.
- Journal Volume
- 26
- Journal Issue
- 1
- Series
- Solid-State Electron.
- Journal Page Range
- 19-24
- ISSN
- 0038-1101
INIS
- Country of Publication
- United Kingdom
- Country of Input or Organization
- United Kingdom
- INIS RN
- 14803719
- Subject category
- S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
- Descriptors DEI
- ANNEALING; CARRIER DENSITY; DOSE RATES; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ENERGY DEPENDENCE; FABRICATION; FIELD EFFECT TRANSISTORS; GALLIUM ARSENIDES; INTEGRATED CIRCUITS; ION IMPLANTATION; LOGIC CIRCUITS
- Descriptors DEC
- ARSENIC COMPOUNDS; ARSENIDES; CURRENTS; ELECTRONIC CIRCUITS; GALLIUM COMPOUNDS; HEAT TREATMENTS; SEMICONDUCTOR DEVICES; TRANSISTORS