Method for the improvement of the radiation resistance of silicon transistors by means of silicon oxide coatings

In order to use silicon planar transistors with a pnp or npn structure or silicon transistors with a surface layer of silicon oxide resp. MOS field effect transistors under extreme conditions, e.g. in space or in nuclear reactors, their radiation resistance is improved. To achieve this, the transistors are bombarded during production with electrons having an energy below 150 keV and causing a dose between 109 and 1012 rads in the boundary layer between silicon and silicon oxide. In this process, the transistors are heated to a temperature between 150 and 4500C. At he same time an electric potential difference in forward direction is applied between emitter or collector and base, the limits of base and collector currents not being exceeded. The energy of the electron beam depends on the thickness of the silicon surface layer or silicon disc. (DG)