Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC

The upgrade of the LHC to the HL-LHC requires a new ITk detector. The innermost part of this new tracker is a pixel detector. The University of Wuppertal is developing a new DCS to monitor and control this new pixel detector. The current concept envisions three parallel paths of the DCS. The first path, called security path, is hardwired and provides an interlock system to guarantee the safety of the detector and human beings. The second path is a control path. This path is used to supervise the entire detector. The control path has its own communication lines independent from the regular data readout for reliable operation. The third path is for diagnostics and provides information on demand. It is merged with the regular data readout and provides the highest granularity and most detailed information. To reduce the material budget, a serial power scheme is the baseline for the pixel modules. A new ASIC used in the control path is in development at Wuppertal for this serial power chain. A prototype exists already and a proof of principle was demonstrated. Development and research is ongoing to guarantee the correct operation of the new ASIC in the harsh environment of the HL-LHC. The concept for the new DCS will be presented in this paper. A focus will be made on the development of the DCS chip, used for monitoring and control of pixel modules in a serial power chain.