Published August 19, 2008 | Version v1
Report

Development of a CMOS SOI Pixel Detector

Description

We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 (micro)m fully-depleted-SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5 mm2 consisting of 20 x 20 (micro)m2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a β ray radioactive source indicate successful operation of the detector. We also briefly discuss the back gate effect as well as the simulation study

Availability note (English)

Available from http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-13374.pdf; http://www.slac.stanford.edu/cgi-wrap/pubpage?slac-pub-13374.html; PURL: https://www.osti.gov/servlets/purl/937201-kNevVL/

Additional details

Publishing Information

Imprint Pagination
4 p.
Report number
SLAC-PUB--13374

Conference

Title
12. Workshop on Electronics for LHC and Future Experiments
Acronym
LECC 2006
Dates
25-29 Sep 2006
Place
Valencia (Spain)

INIS

Country of Publication
United States
Country of Input or Organization
United States
INIS RN
39114598
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
Resource subtype / Literary indicator
Conference, Non-conventional Literature
Descriptors DEI
BETA DETECTION; DESIGN; PERFORMANCE; RADIATION DETECTORS; SILICON; SUBSTRATES
Descriptors DEC
CHARGED PARTICLE DETECTION; DETECTION; ELEMENTS; MEASURING INSTRUMENTS; RADIATION DETECTION; SEMIMETALS

Optional Information

Contract/Grant/Project number
AC02-76SF00515
Funding organization
US Department of Energy (United States)