Challenges and benefits of designing readout ASICs in advanced technologies

Basic trends in scaling CMOS technologies are reviewed briefly putting emphasis on advantages and limitations to designing readout ASIC. Scaling of noise performance in deep submicron MOSFETs is discussed in context of application in front-end circuits. A comparison of noise performance in deep submicron MOS transistors and in bipolar transistors is presented. Scaling of matching performance is reviewed and impacts on designing analogue circuits are discussed. Design challenges for mixed-signal ASICs related to analogue modelling, substrate coupling of digital noise, speed vs. power optimisation are reviewed briefly. Radiation effects in deep submicron CMOS technologies are reviewed and radiation hardening strategy towards Super LHC applications is discussed