Published July 1, 2014 | Version v1
Journal article

Self-aligned graphene field-effect transistors on SiC (0001) substrates with self-oxidized gate dielectric

  • 1. National Key Laboratory of ASIC, Hebei Semiconductor Research Institute, Shijiazhuang 050051 (China)
  • 2. Information Center of Science and Technology, Beijing 100040 (China)

Description

A scalable self-aligned approach is employed to fabricate monolayer graphene field-effect transistors on semi-insulated 4H-SiC (0001) substrates. The self-aligned process minimized access resistance and parasitic capacitance. Self-oxidized Al2O3, formed by deposition of 2 nm Al followed by exposure in air to be oxidized, is used as gate dielectric and shows excellent insulation. An intrinsic cutoff frequency of 34 GHz and maximum oscillation frequency of 36.4 GHz are realized for the monolayer graphene field-effect transistor with a gate length of 0.2 μm. These studies show a pathway to fabricate graphene transistors for future applications in ultra-high frequency circuits. (semiconductor devices)

Availability note (English)

Available from http://dx.doi.org/10.1088/1674-4926/35/7/074006

Additional details

Publishing Information

Journal Title
Journal of Semiconductors
Journal Volume
35
Journal Issue
7
Journal Page Range
[5 p.]
ISSN
1674-4926