Published January 1, 2019 | Version v1
Journal article

Fabrication of Ge MOS with low interface trap density by ALD of Al2O3 on epitaxially grown Ge

  • 1. School of Fundamental Science and Technology, Keio University, 3-14-1 Hiyoshi, Yokohama 223-8522 (Japan)
  • 2. Advanced Research Laboratories, Tokyo City University, 8-15-1 Todoroki, Setagaya, Tokyo 158-0082 (Japan)

Description

Effects of initial surface conditions on interface characteristics of Al2O3/GeOx/Ge gate stacks are studied. As a clean surface condition prior to atomic layer deposition (ALD), a non-terminated Ge surface is realized by the insertion of an epitaxial Ge layer are grown on a Ge substrates in a MBE chamber which is directly connected to an ALD chamber. For these structures, the fixed charge density (Q f) and interface trap density (D it) are evaluated from the C-V characteristics and conductance method. Q f reduction of about 17% and 90% are achieved by insertion of the epi-Ge layer and additional GeOx formation using plasma post-oxidation, respectively. A 90% reduction of D it is also confirmed. These results indicate the importance of the initial Ge surface conditions before ALD and the Al2O3/GeOx/Ge gate stacks are very promising for high mobility Ge based CMOS applications. (paper)

Availability note (English)

Available from http://dx.doi.org/10.1088/1361-6641/aaf19b

Additional details

Identifiers

Publishing Information

Journal Title
Semiconductor Science and Technology
Journal Volume
34
Journal Issue
1
Journal Page Range
[5 p.]
ISSN
0268-1242
CODEN
SSTEET