Published May 2016 | Version v1
Miscellaneous Restricted

Study by TCAD simulation of design and temperature effects of a CMOS inverter on the Latch-up sensitivity

Creators

  • 1. Sofradir, 21, Avenue de Valence, 38113 Veurey-Voroize Cedex (France)
  • 2. ONERA, 2, avenue Edward Belin, 31000 Toulouse Cedex (France)

Description

The authors report a study by simulation of the electrical characteristics of a CMOS inverter with respect to the Latch-up phenomenon (SEL, single-event latch-up) by using the TCAD simulator (Technology Computer Aided Design). Triggering mechanisms of the Latch-up phenomenon have been studied, and this allowed sensitivity trends to be deduced with respect to the CMOS inverter geometrical parameters. A specific physical analysis of mechanisms in very low temperature resulted in the definition of a set of physical models (Shallow Level Impact Ionization, and so on) necessary for the modelling of the unexpected increase of SEL sensitivity. Results obtained under low temperature are in very good agreement with experimental measurements

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Additional details

Additional titles

Original title (French)
Etude par simulation TCAD des effets design et temperature d'un inverseur CMOS sur la sensibilite Latchup

Identifiers

URL
http://www.iaea.org/inis/Contacts/;

Publishing Information

Imprint Pagination
6 p.
Report number
INIS-FR--17-0842

Conference

Title
19. National Days of the Doctoral Network in Micro-nano-electronics - JNRDM
Original Conference Title
19emes Journees Nationales du Reseau Doctoral en Micro-nanoelectronique - JNRDM
Dates
11-13 May 2016
Place
Toulouse (France)

INIS

Country of Publication
France
Country of Input or Organization
France
INIS RN
48078620
Subject category
S42: ENGINEERING; S77: NANOSCIENCE AND NANOTECHNOLOGY;
Resource subtype / Literary indicator
Conference
Descriptors DEI
COMPARATIVE EVALUATIONS; COMPUTER-AIDED DESIGN; COMPUTERIZED SIMULATION; ELECTRICAL FAULTS; ELECTRICAL PROPERTIES; GEOMETRY; INVERTERS; MICROELECTRONIC CIRCUITS; MICROELECTRONICS; MOS TRANSISTORS; OPTIMIZATION; SENSITIVITY ANALYSIS; SPACE DEPENDENCE; TEMPERATURE DEPENDENCE
Descriptors DEC
DESIGN; ELECTRICAL EQUIPMENT; ELECTRONIC CIRCUITS; EQUIPMENT; EVALUATION; MATHEMATICS; PHYSICAL PROPERTIES; SEMICONDUCTOR DEVICES; SIMULATION; TRANSISTORS

Optional Information

Notes
27 refs.; Available from the INIS Liaison Officer for France, see the 'INIS contacts' section of the INIS website for current contact and E-mail addresses: http://www.iaea.org/inis/Contacts/