Published May 19, 2004 | Version v1
Report Restricted

ASIC Development for Three-Dimensional Silicon Imaging Array for Cold Neutrons

Description

An Integrated Circuit (IC) readout chip with four channels arranged so as to receive input charge from the corners of the chip was designed for use with 5- to 7-mm pixel detectors. This Application Specific IC (ASIC) can be used for cold neutron imaging, for study of structural order in materials using cold neutron scattering or for particle physics experiments. The ASIC is fabricated in a 0.5-(micro)m n-well AMI process. The design of the ASIC and the test measurements made is reported. Noise measurements are also reported

Availability note (English)

Available from INIS in electronic form; Also available from OSTI as DE00940252; PURL: https://www.osti.gov/servlets/purl/940252-vCjMDu/

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Additional details

Publishing Information

Imprint Pagination
5 p.
Report number
ORNL--00-0595

INIS

Country of Publication
United States
Country of Input or Organization
United States
INIS RN
40007638
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
Descriptors DEI
COLD NEUTRONS; DESIGN; INTEGRATED CIRCUITS; PHYSICS; SCATTERING; SILICON
Descriptors DEC
BARYONS; ELECTRONIC CIRCUITS; ELEMENTARY PARTICLES; ELEMENTS; FERMIONS; HADRONS; MICROELECTRONIC CIRCUITS; NEUTRONS; NUCLEONS; SEMIMETALS

Optional Information

Contract/Grant/Project number
AC05-00OR22725
Notes
doi 10.2172/940252
Funding organization
USDOE Office of Science (Seychelles) (US)