Published July 2009
| Version v1
Journal article
The Study of Fault Location for Front-End Electronics System
Creators
- 1. College of Physical Science and Technology, Huazhong Normal University, Wuhan, Hubei (China)
Description
Since some devices on the latest developed 250 ALICE/PHOS Front-end electronics (FEE) system cards had been partly or completely damaged during lead-free soldering. To alleviate the influence on the performance of FEE system and to locate fault related FPGA accurately, we should find a method for locating fault of FEE system based on the deep study of FPGA configuration scheme. It emphasized on the problems such as JTAG configuration of multi-devices, PS configuration based on EPC series configuration devices and auto re-configuration of FPGA. The result of the massive FEE system cards testing and repairing show that that location method can accurately and quickly target the fault point related FPGA on FEE system cards. (authors)
Additional details
Publishing Information
- Journal Title
- Nuclear Electronics and Detection Technology
- Journal Volume
- 29
- Journal Issue
- 4
- Journal Page Range
- p. 760-763, 791
- ISSN
- 0258-0934
INIS
- Country of Publication
- China
- Country of Input or Organization
- China
- INIS RN
- 42086392
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Descriptors DEI
- ALICE; CHARGES; CONFIGURATION; ELECTRONIC EQUIPMENT; EQUIPMENT; FAILURES; LEAD; PERFORMANCE; POSITIONING; SOLDERING; TESTING
- Descriptors DEC
- ELEMENTS; EQUIPMENT; FABRICATION; JOINING; MAGNETIC MIRRORS; METALS; OPEN PLASMA DEVICES; THERMONUCLEAR DEVICES; WELDING
Optional Information
- Notes
- 3 figs., 1 tab., 6 refs.