FATALIC: A fully integrated electronics readout for the ATLAS tile calorimeter at the HL-LHC

The ATLAS Collaboration has started a vast program of upgrades in the context of high-luminosity LHC (HL-LHC) foreseen in 2024. The current readout electronics of every sub-detector, including the Tile Calorimeter, must be upgraded to comply with the extreme HL-LHC operating conditions. The ASIC described in this document, named Front-end ATlAs tiLe Integrated Circuit (FATALIC), has been developed to fulfill these requirements. FATALIC is based on a 130 nm CMOS technology and performs the complete signal processing (amplification, shaping and digitization) over a large dynamic range. A dedicated channel for low current is also designed to perform the detector calibration with a radioactive cesium source. The design and performances of FATALIC are described including test beam data analysis.