A novel SiC power MOSFET with integrated polySi/SiC heterojunction freewheeling diode

The adoption of intrinsic body diode of SiC MOSFETs as freewheeling diode (FWD) always induces high conduction loss and reverse recovery loss, therefore it is highly desirable to integrate a low loss FWD in SiC MOSFET. In this paper, we propose a new concept of monolithically integrating a polySi/SiC heterojunction diode (HJD) in SiC planar MOSFET (HJDMOS) without sacrificing MOSFET cell density or increasing much processing complexity. The HJD is formed between the gate polysilicon and the SiC JFET region using the same polysilicon deposition, thus the MOSFET and FWD can share the JFET and drift region in a time-multiplexing way. The SiC HJDMOS not only inactivates the body diode by offering lower turn-on voltage but also shows excellent reverse recovery characteristics because the HJD behaves like a Schottky barrier diode. Meanwhile, the gate-to-drain charge (Q _gd) and gate-to-drain capacitance (C _gd) of the SiC HJDMOS are significantly reduced by 8.0 times and 4.6 times in comparison with the conventional MOSFET due to the reduction of the overlapping area of gate and drain region. With optimal selection of design parameters, the integrated device maintains good MOSFET performances with forward blocking voltage of >1200 V and specific on-resistance (R _on,sp) of 2.2 mΩ cm². Therefore, the obtained figure-of-merits ($R_{\text{on,sp}}\times Q_{\text{gd}}$ and $R_{\text{on,sp}}\times C_{\text{gd}}$) of SiC HJDMOS are improved by around 7.5 times and 4.3 times, respectively. The enhanced performances suggest that SiC HJDMOS is an excellent choice for high efficiency and high frequency power electronic applications. (paper)