Total dose behavior of partially depleted SOI dynamic threshold voltage MOS (DTMOS) for very low supply voltage applications (0.6 - 1 V)

In this paper, we presented two DTMOS architectures processed with a partially depleted SOI technology. The first architecture, DTMOS without limiting transistor, is dedicated to ultra-low voltage applications, at 0.6 V. For 1V applications, the second architecture, DTMOS with limiting transistor, needs an additional transistor to limit the body-source diode current. The total dose irradiation of both DTMOS architectures induces no change of the drain current, but an increase of the body-source diode current. Total dose induced trapped charge in the buried oxide increases the body potential of the DTMOS transistor. It induces an increase of the current flow at the back interface of the silicon film. Irradiation of complex circuits using DTMOS transistors would lead to a degradation of the stand-by consumption. (authors)