Published May 2011
| Version v1
Journal article
PDSOI DTMOS for analog and RF application
Creators
- 1. Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)
Description
Based on the platform of 0.35 μm PDSOI CMOS process technology, the partially depleted silicon-on-insulator dynamic threshold voltage (PDSOI DT) NMOS with an H-gate was implemented. The analog characteristics and RF characteristics of the gate-body contacted dynamic threshold voltage H-gate NMOS and conventional H-gate NMOS were performed and compared. Furthermore, the fundamental operation principle and physical mechanism of the PDSOI H-gate DTMOS compared with the conventional H-gate NMOS are analyzed in detail. The results indicate that the cutoff frequency can reach 40 GHz and the maximum oscillation frequency 29.43 GHz as Vgs = 0.7 V and Vds = 1 V (semiconductor devices)
Availability note (English)
Available from http://dx.doi.org/10.1088/1674-4926/32/5/054004Additional details
Identifiers
Publishing Information
- Journal Title
- Journal of Semiconductors
- Journal Volume
- 32
- Journal Issue
- 5
- Journal Page Range
- [5 p.]
- ISSN
- 1674-4926
INIS
- Country of Publication
- United Kingdom
- Country of Input or Organization
- International Atomic Energy Agency (IAEA)
- INIS RN
- 43015489
- Subject category
- S36: MATERIALS SCIENCE;
- Descriptors DEI
- ELECTRIC POTENTIAL; GHZ RANGE; SEMICONDUCTOR DEVICES; SILICON
- Descriptors DEC
- ELEMENTS; FREQUENCY RANGE; SEMIMETALS