Nuclear radiation effects on integrated circuits

Logic functions widely use two basic integrated circuit technologies. - TTL (Transistor Transistor Logic); - C-MOS (Complementary-Metal Oxide Semiconductor). The main differences between the basic elements of those technologies induce various perturbations under radiation environment, which will be described. Under neutrons, the superiority of C-MOS compared to TTL will be demonstrated; on the other hand the better behaviour of TTL devices compared to that of C-MOS under #betta# or X-ray radiation will be discussed. A review of ionising radiation pulse induced effects inside the integrated circuit monolithics structure will allow us to express the corresponding physical processes which produce the observed behaviour (relation to the dose rate vulnerability thresholds). For those devices, the insulation is implemented by semiconductor junctions; this structure is responsible for logic circuit blocking, known as ''latch up'' which can lead to junction or metal burn out. In order to eliminate those phenomena some technical improvements are reviewed, based on changes in insulating process. Specifically, insulation by SiO2 layers (EPIC Technology) and SOS (Silicon on Saphire Technology) will be discussed. Some results under radiation, will be given, for those technologies