Published November 1984
| Version v1
Report
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Microstore: the Stanford analog memory unit
Description
An NMOS device has been developed which provides high speed analog signal storage and readout for time expansion of transient signals. This device takes advantage of HMOS-1 VLSI technology to implement an array of 256 storage cells. Sequential samples of an input waveform can be taken every 5 ns while providing an effective sampling aperture time of less than 1 ns. The design signal-to-noise ratio is 1 part in 2000. Digital control circuitry is provided on the chip for controlling the read-in and read-out processes. A reference circuit is incorporated in the chip for first order compensation of leakage drifts, sampling pedestals, and temperature effects
Availability note (English)
MF available from INIS under the Report Number; Available from NTIS, PC A02/MF A01; 1 as DE85005534.Files
16072590.pdf
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Additional details
Publishing Information
- Imprint Pagination
- 6 p.
- Report number
- SLAC-PUB--3503
Conference
- Title
- Nuclear science symposium.
- Dates
- 31 Oct - 2 Nov 1984.
- Place
- Orlando, FL (USA).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 16072590
- Subject category
- S99: GENERAL AND MISCELLANEOUS;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ANALOG SYSTEMS; ANALOG-TO-DIGITAL CONVERTERS; CONTROL SYSTEMS; DATA ACQUISITION SYSTEMS; ELECTRONIC CIRCUITS; INTEGRATED CIRCUITS; MEMORY DEVICES; TRANSIENTS
- Descriptors DEC
- ELECTRONIC EQUIPMENT; EQUIPMENT
Optional Information
- Secondary number(s)
- CONF-841007--61.