The common GBTX based prototype readout board for CBM

The Compressed Baryonic Matter (CBM) experiment at FAIR is a fixed target heavy ion experiment planned to operate at high interaction rates up to 10 MHz using self-triggering frontend electronics. The readout chains for most subsystems in CBM consist of: (1) detector specific frontend boards with custom ASICs, (2) readout boards (ROB) for data aggregation from many electrical links and conversion to optical data transmission, and (3) common FPGA based data processing boards (DPB) for data preprocessing, time slice building and interfacing to slow and fast control. Several CBM subsystems will employ ROBs based on the radiation hard GBTX data aggregation ASIC and the Versatile Link optical modules developed at CERN. A common CBM prototype readout board (C-ROB) has been developed providing the full GBTX and Versatile Link functionality needed by all systems to readout moderately sized detector assemblies in laboratory and beam tests. It implements 3 GBTX ASICs, one GBT-SCA slow control ASIC and one VTRx and VTTx module each, and provides 42 320 Mb/s frontend readout links on an FPGA mezzanine card (FMC) connector. The concept, realization and current status of the C-ROB are presented.