Design and fabrication of an optimum peripheral region for low gain avalanche detectors

Low Gain Avalanche Detectors (LGAD) represent a remarkable advance in high energy particle detection, since they provide a moderate increase (gain ~10) of the collected charge, thus leading to a notable improvement of the signal-to-noise ratio, which largely extends the possible application of Silicon detectors beyond their present working field. The optimum detection performance requires a careful implementation of the multiplication junction, in order to obtain the desired gain on the read out signal, but also a proper design of the edge termination and the peripheral region, which prevents the LGAD detectors from premature breakdown and large leakage current. This work deals with the critical technological aspects required to optimize the LGAD structure. The impact of several design strategies for the device periphery is evaluated with the aid of TCAD simulations, and compared with the experimental results obtained from the first LGAD prototypes fabricated at the IMB-CNM clean room. Solutions for the peripheral region improvement are also provided.