Published May 1993
| Version v1
Journal article
The double CPU high-speed data pre-processing circuit
Creators
- 1. Academia Sinica, Beijing, BJ (China). Inst. of High Energy Physics
Description
The Double CPU High speed Data Pre-processor (HDP) was developed for the FADC or HAMU high-speed waveform acquisition system based on CAMAC bus. HDP consists of the data pre-processing circuit and the CAMAC controlling circuit. In order to speed up the data pre-processing, two stages of microprocessor (MC 68000, TMS 32010) were adopted, and two sets of data buffer and interrupt method were also used
Additional details
Publishing Information
- Journal Title
- Nuclear Electronics and Detection Technology
- Journal Volume
- 13
- Journal Issue
- 3
- Journal Page Range
- p. 156-160.
- ISSN
- 0258-0934
- CODEN
- HDYUEC
INIS
- Country of Publication
- China
- Country of Input or Organization
- China
- INIS RN
- 25050132
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Descriptors DEI
- BEIJING ELECTRON-POSITRON COLLIDER; CAMAC SYSTEM; DATA ACQUISITION SYSTEMS; DATA PROCESSING; FASTBUS SYSTEM; MICROPROCESSORS; ON-LINE SYSTEMS; PROGRAMMING; VELOCITY; WAVE FORMS
- Descriptors DEC
- ACCELERATORS; ELECTRONIC CIRCUITS; LINEAR ACCELERATORS; MICROELECTRONIC CIRCUITS; STORAGE RINGS