Novel serial-parallel converter using SFQ logic circuits

Ultra-fast operation with ultra-low power consumption and ballistic transmission of signals are attractive features of single-flux-quantum (SFQ) circuits for building large-scale digital systems. We have been designing SFQ circuits based on the bit-serial architecture, which can reduce the circuit area and timing error induced by clocking skew. In the bit-serial circuits, a serial-parallel converter, which is one of key circuits, is used for I/O interfaces, address decoders, multipliers and so on. In this paper, we propose a novel architecture for the SFQ serial-parallel converter whose latency is very small compared with conventional one. And, we have designed some SFQ circuits suitable for the proposed circuit. As an example, we have implemented and tested SFQ 4-bit multifunctional buffers using the SRL 2.5 kA/cm2 niobium standard process. We have successfully confirmed all functions of the multifunctional buffer at low speed