Design of FIR digital filter for baseline measurement

Distributed Arithmetic is more efficient than multipliers for implementing finite impulse response (FIR) digital filters on an FPGA. The functional simulation, timing simulation and implementation of the FIR digital filter by using ISE, verify the results on the board and at last complete the spectrum analysis of the output signals by using Matlab. The digital filter is designed for the baseline measurement in a noisy environment. (authors)