Published August 2012
| Version v1
Book
2D data acquisition system of delay-line MWPC based on interpolation TDC
- 1. School of Nuclear Science and Technology, Lanzhou University (China)
Description
This paper designs a time digital converter basing on the technology of interpolation. The multi-clock is provided by the programmable PLL (Phase Locked Loop) in FPGA (Field Programmable Gate Array) chip. The phase of the multi-clock can be set. The circuit implements the system of 2D data acquisition about the delay-line MWPC (Multi Wire Proportion Chamber). It improves effectively the precision of time measurement in limited clock frequency. (authors)
Additional details
Publishing Information
- Publisher
- Chinese Nuclear Society
- Imprint Place
- Beijing (China)
- Imprint Title
- Proceedings of 16. national conference on nuclear electronics and nuclear detection technology (part 1)
- Imprint Pagination
- 361 p.
- Journal Page Range
- p. 96-101
Conference
- Title
- 16. national conference on nuclear electronics and nuclear detection technology
- Dates
- 15 Aug 2012
- Place
- Sichuan (China)
INIS
- Country of Publication
- China
- Country of Input or Organization
- China
- INIS RN
- 47094234
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; S97: MATHEMATICAL METHODS AND COMPUTING;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ACCURACY; DATA ACQUISITION SYSTEMS; ELECTRONIC CIRCUITS; GATING CIRCUITS; INTERPOLATION; LOGIC CIRCUITS; MULTIWIRE PROPORTIONAL CHAMBERS; TIME MEASUREMENT
- Descriptors DEC
- ELECTRONIC CIRCUITS; MATHEMATICAL SOLUTIONS; MEASURING INSTRUMENTS; NUMERICAL SOLUTION; PROPORTIONAL COUNTERS; RADIATION DETECTORS
Optional Information
- Notes
- 5 figs., 3 refs.