Nanocluster technologies for electronics design

The work presented in this thesis covers an investigation into the use of metal nanoclusters in nanoelectronics design. Initial studies explored the interactions of the dodecanethiol passivated gold nanocluster, held in solution with toluene, and the native oxide covered silicon surface. Deposition of the clusters is achieved by pippetting μ-litre quantities of the solution onto the surface, and allowing the solvent to evaporate leaving the clusters as residue. Patterning of the surface with micron scale photoresist structures prior to cluster exposure, led to the selective aggregation of cluster deposits along the resist boundaries. An extension of this technique, examined the flow of the cluster solution along photoresist structures which extended beyond the solution droplet. Investigation into the electronic properties of nanocluster arrays generated non-linear current-voltage curves, which are explained in terms of two very simple models. These results cast doubt over the suitability of the lateral approach to nanocluster device fabrication, and led to the exploration of vertical device design. Vertical devices, based around ∼50nm diameter silicon nanopillars with nanoclusters on top, afford the necessary level of control over all aspects of nanocluster positioning: deposition of a single cluster layer is confined laterally to the pillar cross-section. Initial results of vertical device fabrication, show the considerable promise of this approach to cluster based electronic systems. (author)