A novel method for source/drain ion implantation for 20 nm FinFETs and beyond

This paper presents a method to improve source/drain extension (SDE) ion implantation (I/I) process for sub-20 nm node FinFETs with no extra step in transistor process. Traditionally, SDE I/I process needs a large implant tilt angle and a high dose to obtain a heavy and conformal doping. However, this process leads to implantation shadow effects and Si-fin amorphization. These drawbacks can be removed in our new approach when SDE I/I is modified and moved after S/D epitaxy process (SDE I/I-last). Because of the facet planes of the SiGe layer, the ions are allowed to be implanted with small tilt. This is helpful to avoid shadow effects of implantation and to keep the low defect density in the S/D. As a result, the external resistance (R_EXTRNL) is not high and the strain relaxation is minor in S/D epitaxy layer. Finally, p-type FinFETs with 25 nm gate length with SDE I/I-last are fabricated. These new FinFETs demonstrate ~ 50% on-state current (I_ON) improvement compared to those transistors fabricated by traditional method.