Published July 2018 | Version v1
Journal article

Analytical study of nano-scale logical operations

  • 1. Physics and Applied Mathematics Unit, Indian Statistical Institute, 203 Barrackpore Trunk Road, Kolkata, 700 108 (India)

Description

Highlights: • Logical operations at nano-scale level are discussed. • Three basic and two universal logic gates are designed. • All results are performed analytically. • Simple tailor made geometries are taken into account. • Proposed results can be verified in laboratory. A complete analytical prescription is given to perform three basic (OR, AND, NOT) and two universal (NAND, NOR) logic gates at nano-scale level using simple tailor made geometries. Two different geometries, ring-like and chain-like, are taken into account where in each case the bridging conductor is coupled to a local atomic site through a dangling bond whose site energy can be controlled by means of external gate electrode. The main idea is that when injecting electron energy matches with site energy of local atomic site transmission probability drops exactly to zero, whereas the junction exhibits finite transmission for other energies. Utilizing this prescription we perform logical operations, and, we strongly believe that the proposed results can be verified in laboratory. Finally, we numerically compute two-terminal transmission probability considering general models and the numerical results match exactly well with our analytical findings.

Availability note (English)

Available from http://dx.doi.org/10.1016/j.physe.2018.03.021

Additional details

Identifiers

DOI
10.1016/j.physe.2018.03.021;
arXiv
arXiv:1809.06567v1;
PII
S1386947717319537;

Publishing Information

Journal Title
Physica E. Low-Dimensional Systems and Nanostructures (Print)
Journal Volume
101
Journal Page Range
p. 151-156
ISSN
1386-9477

INIS

Country of Publication
Netherlands
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
53037042
Subject category
S77: NANOSCIENCE AND NANOTECHNOLOGY;
Descriptors DEI
COMPUTER ARCHITECTURE; ELECTRODES; ELECTRONIC EQUIPMENT; TRANSFER MATRIX METHOD
Descriptors DEC
CALCULATION METHODS; EQUIPMENT

Optional Information

Copyright
Copyright (c) 2018 Elsevier B.V. All rights reserved.