Published January 27, 2014 | Version v1
Journal article

High-frequency characterization of thermionic charge transport in silicon-on-insulator nanowire transistors

  • 1. Hitachi Cambridge Laboratory, J. J. Thomson Avenue, Cambridge CB3 0HE (United Kingdom)
  • 2. SPSMS, UMR-E CEA/UJF-Grenoble 1, INAC, 17 rue des Martyrs, 38054 Grenoble (France)
  • 3. Laboratoire Pierre Aigrain, ENS-CNRS UMR 8551, Universités P. et M. Curie and Paris-Diderot, 24, rue Lhomond, 75231 Paris Cedex 05 (France)

Description

We report on DC and microwave electrical transport measurements in silicon-on-insulator nano-transistors at low and room temperature. At low source-drain voltage, the DC current and radio frequency response show signs of conductance quantization. We attribute this to Coulomb blockade resulting from barriers formed at the spacer-gate interfaces. We show that at high bias transport occurs thermionically over the highest barrier: Transconductance traces obtained from microwave scattering-parameter measurements at liquid helium and room temperature are accurately fitted by a thermionic model. From the fits we deduce the ratio of gate capacitance and quantum capacitance, as well as the electron temperature

Additional details

Identifiers

Publishing Information

Journal Title
Applied Physics Letters
Journal Volume
104
Journal Issue
4
Journal Page Range
p. 043106-043106.4
ISSN
0003-6951
CODEN
APPLAB

Optional Information

Notes
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