Design concept for radiation hardening of low power and low voltage dynamic memories

A radiation hard low power, low voltage dynamic memory is obtained by the use of a dummy cell concept. Compared to conventional dummy cell concepts, this concept applies a fully sized dummy cell. By optimizing the dummy cell precharge voltage for 5 V and 3 V operation and the timing of the dummy word-line, the overall soft error rate (SER) of the chip is improved by 2 orders of magnitude. An additional improvement of 1 order of magnitude is possible for 3 V operation by adjusting substrate bias and cell plate voltage. The results are verified by an accelerated SER measurement with a radium 226 source and an additional field soft error study