Modification of single event upset cross section of an SRAM at high frequencies

Single event upsets (SEU) occur in integrated circuits when ions, such as a cosmic rays, pass through sensitive transistors and deposit sufficient charge to switch the logic state of the transistor. Single event upset cross sections exhibit a clock frequency dependence, the origins of which have been investigated in a CMOS SRAM, both with a pulsed laser synchronized to the operation of the circuit and with a circuit simulator modeling program