Published 1999 | Version v1
Miscellaneous Open

Circuit demonstrations utilizing a radiation-hard silicon iso-planar CRYO-CMOS process

Creators

  • 1. Raytheons Systems Co., Newport Beach (United States)

Description

A radiation-hard iso-planar CMOS process with sub-micron geometries suitable for room temperature and cryogenic operation is described here in. Excellent device performance and radiation tolerance for transistors with as small as 0.6 μ channel lengths is achieved with this process. We have successfully fabricated, and tested for the effects of radiation up to 1 Mrad(Si), 64 K and 256 K nonvolatile electrical erasable memories (EEPROMs), 14 bit Analog to Digital Converters (ADCs), and focal plane array readout circuits using this process. (authors)

Availability note (English)

Available from INIS in electronic form

Files

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Additional details

Additional titles

Original title (English)
Demonstrations de circuits utilisant un procede de fabrication CMOS sur silicium isoplanaire durci et cryogenique

Publishing Information

Imprint Pagination
[2 p.]
Report number
INIS-FR--2057

Conference

Title
5. European conference on radiation and its effects on components and systems
Original Conference Title
5. congres europeen les radiations et leurs effets sur les composants et les systemes
Dates
13-17 Sep 1999
Place
Abbaye de Fontevraud (France)

INIS

Country of Publication
France
Country of Input or Organization
France
INIS RN
34078051
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
Resource subtype / Literary indicator
Conference
Descriptors DEI
ANALOG-TO-DIGITAL CONVERTERS; FABRICATION; MOS TRANSISTORS; PERFORMANCE; RADIATION HARDENING; READOUT SYSTEMS; SPECIFICATIONS
Descriptors DEC
ELECTRONIC EQUIPMENT; EQUIPMENT; HARDENING; PHYSICAL RADIATION EFFECTS; RADIATION EFFECTS; SEMICONDUCTOR DEVICES; TRANSISTORS