Published 2012 | Version v1
Book

3D integration technology for hybrid pixel detectors designed for particle physics and imaging experiments

  • 1. CEA, DRT, Leti MINATEC, F-38054 Grenoble, (France)
  • 2. CERN, European Organization for Nuclear Research, 1211 Geneva 23, (Switzerland)
  • 3. Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, 12800 Prague 2, (Czech Republic)

Description

Hybrid pixel detectors are now widely used in particle physics experiments and are becoming established at synchrotron light sources. They have also stimulated growing interest in other fields and, in particular, in medical imaging. Through the continuous pursuit of miniaturization in CMOS it has been possible to increase the functionality per pixel while maintaining or even shrinking pixel dimensions. The main constraint on the more extensive use of the technology in all fields is the cost of module building and the difficulty of covering large areas seamlessly. On another hand, in the field of electronic component integration, a new approach has been developed in the last years, called 3D Integration. This concept, based on using the vertical axis for component integration, allows improving the global performance of complex systems. Thanks to this technology, the cost and the form factor of components could be decreased and the performance of the global system could be enhanced. In the field of radiation imaging detectors the advantages of 3D Integration come from reduced inter chip dead area even on large surfaces and from improved detector construction yield resulting from the use of single chip 4-side buttable tiles. For many years, numerous R and centres and companies have put a lot of effort into developing 3D integration technologies and today, some mature technologies are ready for prototyping and production. The core technology of the 3D integration is the TSV (Through Silicon Via) and for many years, LETI has developed those technologies for various types of applications. In this paper we present how one of the TSV approaches developed by LETI, called TSV last, has been applied to a readout wafer containing readout chips intended for a hybrid pixel detector assembly. In the first part of this paper, the 3D design adapted to the read-out chip will be described. Then the complete process flow will be explained and, finally, the test strategy adopted and the test results obtained will be discussed. Some prospects for the next steps of the project will be also described at the end. (authors)

Availability note (English)

Available from doi: http://dx.doi.org/10.1109/ESTC.2012.6542101

Additional details

Identifiers

Publishing Information

Publisher
Institute of Electrical and Electronics Engineers - IEEE
Imprint Place
New York (United States)
ISBN
978-1-4673-4645-0
Imprint Pagination
6 p.

Conference

Title
4. Electronic System-Integration Technology Conference
Acronym
ESTC 2012
Dates
17-20 Sep 2012
Place
Amsterdam (Netherlands)

INIS

Country of Publication
United States
Country of Input or Organization
France
INIS RN
45026975
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; S72: PHYSICS OF ELEMENTARY PARTICLES AND FIELDS;
Resource subtype / Literary indicator
Conference
Descriptors DEI
CROSS SECTIONS; DESIGN; PASSIVATION; READOUT SYSTEMS; SEMICONDUCTOR DETECTORS; SENSORS
Descriptors DEC
MEASURING INSTRUMENTS; RADIATION DETECTORS

Optional Information

Notes
6 refs.