Surface electronic states in metal-porous silicon-silicon structures

The character of electronic states in porous silicon (PS)-Si, Pd-PS interfaces, and/or PS bulk at the formation of the metal-PS-silicon heterostructure was studied. The energy parameters were estimated using the deep-level transient spectroscopy and capacitance-voltage characteristics at the accounting of the voltage drop distribution along the structure. The analytical expression for voltage drop distribution along dielectric layer, porous layer and space charge region in silicon was obtained by solving the equation for continuity of the electrostatic induction vector. The electronic states studied were shown to manifest the quasi-continuous sub-band in the energy gap if the porous layer was 30-nm thick. Their density increased, as the energy position was being transformed to a deeper energy level of Ev+0.81 eV at the PS layer growing to 90 nm wide