Published October 1, 2018 | Version v1
Journal article

Effect of charge trap layer thickness on the charge spreading behavior within a few seconds in 3D charge trap flash memory

  • 1. School of Electrical Engineering, Kookmin University, Seoul 02707 (Korea, Republic of)
  • 2. Research and Development Division, SK Hynix Semiconductor Inc., Icheon, Gyeongki 17336 (Korea, Republic of)

Description

Charge spreading behavior within a few seconds, referred to as early retention, was comprehensively investigated in 24 word-line stacked tube-type 3D NAND flash memory. We thoroughly explored the charge spreading behavior from the perspectives of both electron and hole spreading in 3D NAND flash memory with different charge trap layer thicknesses at various programming and erasing levels for solid and checkerboard patterns to provide guidelines for minimizing and optimizing the charge spreading. (letter)

Availability note (English)

Available from http://dx.doi.org/10.1088/1361-6641/aade29

Additional details

Identifiers

Publishing Information

Journal Title
Semiconductor Science and Technology
Journal Volume
33
Journal Issue
10
Journal Page Range
[4 p.]
ISSN
0268-1242
CODEN
SSTEET

INIS

Country of Publication
United Kingdom
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
52034540
Subject category
S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
Descriptors DEI
ELECTRONS; HOLES; LAYERS; OPTIMIZATION; RETENTION; SOLIDS; THICKNESS; THREE-DIMENSIONAL LATTICES; TRAPS
Descriptors DEC
CRYSTAL LATTICES; CRYSTAL STRUCTURE; DIMENSIONS; ELEMENTARY PARTICLES; FERMIONS; LEPTONS