Virtual addressing for E-beam lithography

A technique performed in a fixed address particle beam lithographic system where the writing is performed in the normal manner for writing a pattern, for example, a stripe on a resist having a selected feature width except that an additional row of alternate pixels is written either before or after the selected feature is written. The alternate pixels, when the resist is developed, will provide a feature width of approximately 1/2 a pixel wider than the selected feature width due to blurring of the latent image caused by scattering of the particle beam within the resist. Thus, the resolution of selectable feature widths is enhanced with little or no loss of throughput. The same technique can also be utilized to lengthen a feature by 1/2 a pixel width. The technique is disclosed primarily in a raster scan machine but also disclosed is the technique in a vector scan machine. Also disclosed is a flow chart showing the invention used while preparing the data to be written by the machine