The 3081/ /SUB E/ processor and its on-line use

The 3081/ /SUB E/ is a second generation emulator of a mainframe IBM. One of its applications will be to form part of the data acquisition system of the upgraded Mark II detector for data taking at the SLAC linear collider. Since the processor does not have direct connections to I/O devices a FASTBUS interface will be provided to allow communication with both SLAC Scanner Processors (which are responsible for the accumulation of data at a crate level) and the experiment's VAX 8600 mainframe. The 3081/ /SUB E/ 's will supply a significant amount of on-line computing power to the experiment (a single 3081/ /SUB E/ is equivalent to 4-5 VAX 11/780's). A major advantage of the 3081/ /SUB E/ is that program development can be done on an IBM mainframe (such as the one used for off-line analysis) which gives the programmer access to a full range of debugging tools. The processor's performance can be continually monitored by comparison of the results obtained using it to those given when the same program is run on an IBM computer