Published October 1, 2005 | Version v1
Journal article

Leveling of thin film surface by low-incident-angle ion milling for HTS SFQ circuits

  • 1. Superconductivity Research Laboratory, ISTEC, 10-13, Shinonome 1-Chome, Koto-ku, Tokyo 135-0062 (Japan)

Description

We propose a new ion etching procedure to level the surfaces of lower layers in multilayer structures for HTS SFQ circuits. In order to make a flat lower layer, we have utilized a variation in the etching rate with the ion incident angle in ion etching process. The etching process under the acceleration voltage of 280 V and the ion incident angle as low as 15 deg. for 5 min improved the average surface roughness (R a) of the SrSnO3 insulating layer from 2.8 nm to 0.8 nm. This procedure was applied just before the La-YBCO base layer growth on the SrSnO3/La-YBCO groundplane bilayer, which resulted in the base layer with R a much less than 2 nm

Additional details

Identifiers

DOI
10.1016/j.physc.2005.02.119;
PII
S0921-4534(05)00503-4;

Publishing Information

Journal Title
Physica. C, Superconductivity
Journal Volume
426-431
Journal Page Range
p. 1514-1518
ISSN
0921-4534
CODEN
PHYCE6

Conference

Title
17. International symposium on superconductivity - Advances in superconductivity XVII
Acronym
ISS 2004
Dates
23-25 Nov 2004
Place
Niigata (Japan)

Optional Information

Copyright
Copyright (c) 2005 Elsevier Science B.V., Amsterdam, The Netherlands, All rights reserved.