Design and simulation of Gaussian shaping amplifier made only with CMOS FET for FEE of particle detector

The objective of this paper is to design and simulate a shaping amplifier circuit for silicon strip, Si (Li), CdZnTe and CsI detectors, etc., which can be further integrated the whole system and adopted to develop CMOS-based application, specific integrated circuit for Front End Electronics (FEE) of read-out system of nuclear physics, particle physics and astrophysics research, etc. It's why we used only CMOS transistor to develop the entire system. A Pseudo-Gaussian shaping amplifier made by fourth-order integration stage and a differentiation stage give a result same as a true CR-RC4 filter, we perform shaping time in the range, 465 ns to 2.76μs with a low output resistance and the linearity almost good. (authors)