Design and characterization of pixel IC electronics and sensors for new pixel detector generations

The LHC High Luminosity upgrade will result in a significant change of environment in which the particle detectors are going to operate, especially for devices very close to the interaction point like the pixel detectors and their electronics. In order to meet the needs of future detectors R&D programs on all their design aspects are being carried out. This work covers two such topics. The first topic is the development of Depleted Monolithic Active Pixel Senor (DMAPS), which combine the sensor and electronics into one entity. The prototypes are shown to have a performance adequate for HL-LHC ATLAS outer pixel layers and therefore present an interesting, low cost alternative to the baseline hybrid pixel designs. The second topic is the design and characterization of a Clock Data Recovery (CDR) circuit for the pixel readout chip developed for the ATLAS and CMS HL-LHC upgrades. The circuit is shown to have good jitter performance and is radiation hard both in terms of both the Total Ionizing Dose and the Single Event Effects.