Published July 1, 2019 | Version v1
Journal article

Memory state protected from leakage current in Ti/SiN/NiN/Pt bilayer resistive random-access memory devices for array applications

  • 1. Department of Electrical Engineering, Sejong University, Neungdong-ro 209, Gwangjin-gu, Seoul 05006 (Korea, Republic of)
  • 2. School of Electronics Engineering, Chungbuk National University, Cheongju 28644 (Korea, Republic of)

Description

In this work, we present a method to protect the memory state of Pt/NiN/SiN/Ti bilayer memory structures, to integrate resistive switching memory with bipolar resistive switching (BRS) elements into a cross bar array (CBA) structure. In the device, a silicon nitride (SiN) layer acts as area creating BRS, while a nickel nitride (NiN) layer can be used as a selector (S), which results in the selector free resistive random-access memory (RRAM) devices possible to directly integrate into a CBA structure, without the need of additional elements. In addition, the proposed RRAM device shows a stable current ratio of >101 in the repetitive direct current cycling test of 200 times, a long retention time of >105, and a wide read-out margin of 130, which indicates the sneak current path in the crossbar structures was significantly suppressed. We believe that the proposed architecture is a strong candidate for future cross-bar type RRAM applications. (paper)

Availability note (English)

Available from http://dx.doi.org/10.1088/1361-6641/ab2324

Additional details

Identifiers

Publishing Information

Journal Title
Semiconductor Science and Technology
Journal Volume
34
Journal Issue
7
Journal Page Range
[6 p.]
ISSN
0268-1242
CODEN
SSTEET