Impact of electron localization on electrical transport and noise at individual grain boundaries in monolayer MoS₂

Although grain boundaries (GBs) are an inevitable part of the chemical vapour deposition (CVD) growth of 2D materials, their intrinsic electrical properties and role in hindering the device performance of 2D field effect transistors (FETs) remain relatively unquantified. Previous studies on CVD MoS₂ FETs have already shown that conventional time averaged conductance measurements do not adequately probe the kinetic description of the transport process or the electrical performance and quality of the devices because of the highly anisotropic dependence of mobility on the lattice misorientation angle. This work employs a symbiotic two-pronged approach of conductance and noise measurements to establish the extent to which GBs enhance carrier localisation in these systems, which manifests itself not only in the reduction of the localization length by 30%-70% in the GBs as compared to the SG region but also leads to an overall noise enhancement factor of nearly five orders of magnitude. In doing so, this work also serves to extend the range of application of the well-established McWhorter's noise model to localised systems by explaining the origin of the uncharacteristic exponential dependence of low frequency noise with temperature. This modified McWhorter formulation can be readily used to explain the noise behaviour of other 2D electronic systems where localisation dominates the transport landscape