Artifacts suppression using real-time position calculation circuit based on digital signal processor for beta camera

A digital signal processor (DSP) based position calculation circuit was developed and tested for beta camera. The position calculation circuit uses four analog-to-digital (A-D) converters for A-D conversion of the four analog signals from a position sensitive photomultiplier tube (PSPMT). The DSP reads the four A-D signals and calculates the ratio of Xa/(Xa+Xb) and Ya/(Ya+Yb) in event by event basis. The DSP also magnifies the image to fit the useful field of view (FOV) and rejects the events out of the FOV. The line artifacts in the image due to the differential non-linearity of the A-D converters was almost eliminated. (author)