Published 2003
| Version v1
Book
Field programmable gate array (FPGA) implementation of dynamic compensation (DyCom) algorithm for vanadium self-powered neutron detectors
Creators
- 1. Electronics Division, Bhabha Atomic Research Centre, Mumbai (India)
- 2. Electronics Corporation of India Limited, Hyderabad (India)
Description
Full text: A new on-line digital signal processing (DSP) based Dynamic Compensation (DyCom) algorithm has been developed [Das 1999] to speed-up the response time of slow-responding Vanadium self-powered neutron detectors. The algorithm is based on the principles of direct inversion and on-line nonlinear (median) filtering. The algorithm was tested at different research and power reactors on a PC based platform with encouraging results [Das 2001]. This paper discusses the stand-alone FPGA implementation of the DyCom algorithm with the experimental results obtained with prototype FPGA boards
Additional details
Publishing Information
- Publisher
- Indian Society for Radiation Physics
- Imprint Place
- Mumbai (India)
- Imprint Title
- Fifteenth national symposium on radiation physics: nuclear radiation detectors present scenario and future trends
- Imprint Pagination
- 107 p.
- Journal Page Range
- p. 56
Conference
- Title
- 15. national symposium on radiation physics
- Acronym
- NSRP-15
- Dates
- 12-14 Nov 2003
- Place
- Mumbai (India)
INIS
- Country of Publication
- India
- Country of Input or Organization
- India
- INIS RN
- 35042519
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ALGORITHMS; ON-LINE SYSTEMS; SELF-POWERED NEUTRON DETECTORS; SIGNALS; VANADIUM
- Descriptors DEC
- ELEMENTS; MATHEMATICAL LOGIC; MEASURING INSTRUMENTS; METALS; NEUTRON DETECTORS; RADIATION DETECTORS; SELF-POWERED DETECTORS; TRANSITION ELEMENTS