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Amram, Y.; Guillon, H.; Thenard, J.
Nuclear Electronics II. Proceedings of the Conference on Nuclear Electronics. V. II1962
Nuclear Electronics II. Proceedings of the Conference on Nuclear Electronics. V. II1962
AbstractAbstract
[en] A comparator of numbers expressed in the natural binary system, working in parallel, has been produced. This makes it possible to ascertain whether an unknown number X is smaller or greater than a given number A; the case where X = A is not in evidence. The apparatus uses medium quality transistors and has a response time of the order of 1 μs. A combination of two comparators working together forms a ''conditioner'' which identifies the condition A < X < B. By making certain adjustments, the limits can be contained within the conditioning interval. (author)
[fr]
Un comparateur de nombres exprimes dans le systeme binaire naturel, fonctionnant en parallele, a ete realise. Il permet de reconnaitre si un nombre inconnu X est inferieur ou superieur a un nombre donne A, l'egalite X = A n'etant pas mise en evidence. L'appareil construit avec des transistors de qualite moyenne a un temps de reponse de l'ordre de 1 μs. L'association de deux comparateurs fonctionnant en coincidence constitue un < conditionneur> qui met en evidence la condition A < X < B. Moyennant certaines modifications, les bornes peuvent etre incluses dans l'intervalle de conditionnement. (author)[es]
Se ha construido un comparador de cifras expresadas en el sistema binario natural que funciona en paralelo. Permite determinar si una cifra desconocida X es inferior o superior a una cifra dada A ; la igualdad X = A no se pone en evidencia. El aparato esta construido con transistores de calidad media y tiene un tiempo de respuesta del orden de 1 μs. La asociacion de dos comparadores que funcionen en coincidencia constituye un < condicionador> que hace evidente la condicion A < X < B. Merced a algunas modificaciones, los terminales pueden incluirse en el intervalo de acondicionamiento. (author)[ru]
Byl sozdan parallel'no vklyuchaemyj sravnitel' chisel, vyrazhennykh v natural'noj dvoichnoj sisteme. On daet vozmozhnost' opredelyat', yavlyaetsya li neizvestnoe chislo X bol'she ili men'she dannogo chisla A, ne vyyavlyaya ravenstva X = A. Apparat postroen na tranzistorakh srednego kachestva so vremenem srabatyvaniya poryadka 1 μs. Sparivanie dvukh dejstvuyushchikh po printsipu sovpadenij sravnitelej obrazuet ''konditsioner'', kotoryj vyyavlyaet uslovie A < X < b. Pri pomoshchi nekotorykh izmenenij v konditsionirovannyj interval mogut byt' vklyucheny promezhutochnye zazhimy. (author)Original Title
Comparateur de nombres binaires; Sravnitel' dvoichnykh chisel; Comparador de cifras binarias
Primary Subject
Source
International Atomic Energy Agency, Vienna (Austria); 473 p; Apr 1962; p. 85-90; Conference on Nuclear Electronics; Belgrade, Yugoslavia (Serbia); 15-20 May 1961; ISSN 0074-1884;
; 2 figs, 2 refs

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AbstractAbstract
[en] The application of superconducting direct-current comparators to the measurement of resistance ratios is described. One comparator consists of a binary set of ratios between 1:1 and 160:1 providing for self-calibration by a buildup procedure. A second comparator exhibiting discrete ratios of 1:1, 10:1, and 100:1 is also described. Ratio uncertainty of less than 1 part in 109 is achieved by enclosing the ratio windings in overlapping toroidal superconducting shields. Superconducting quantum interference devices serve as flux sensors for the comparators. One of these current comparators is used to calibrate a 100:1Ω resistive divider, which at a current of 10 mA exhibits a self-heating error of 0.0023 ppm
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Journal Article
Journal
IEEE Transactions on Instrumentation and Measurement; v. IM-23(4); p. 256-260
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AbstractAbstract
[en] A digitization scheme of sub-microampere current using a commercial comparator with adjustable hysteresis and FPGA-based Wave Union TDC has been tested. The comparator plus a few passive components forms a current controlled oscillator and the input current is sent into the hysteresis control pin. The input current is converted into the transition times of the oscillations, which are digitized with a Wave Union TDC in FPGA and the variation of the transition times reflects the variation of the input current. Preliminary tests show that input charges < 25 fC can be measured at > 50 M samples/s without a preamplifier.
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Source
TWEPP-12: Topical workshop on electronics for particle physics 2012; Oxford (United Kingdom); 17-21 Sep 2012; Available from http://dx.doi.org/10.1088/1748-0221/8/01/C01019; Country of input: International Atomic Energy Agency (IAEA)
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Journal Article
Literature Type
Conference
Journal
Journal of Instrumentation; ISSN 1748-0221;
; v. 8(01); p. C01019

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Solov'eva, D.N.; Novikov, L.G.
Scientific session NRNU MEPHI-2010. XIII International Telecommunication Conference of students and young scientists Young people and science. Book of abstracts. In three parts. Part 12010
Scientific session NRNU MEPHI-2010. XIII International Telecommunication Conference of students and young scientists Young people and science. Book of abstracts. In three parts. Part 12010
AbstractAbstract
No abstract available
Original Title
Dvukhporogovyj tsifrovoj komparator
Primary Subject
Source
Ministerstvo Obrazovaniya i Nauki Rossijskoj Federatsii, Moscow (Russian Federation); Federal'noe Agentstvo po Obrazovaniyu, Moscow (Russian Federation); Gosudarstvennaya Korporatsiya po Atomnoj Ehnergii Rosatom, Moscow (Russian Federation); Natsional'nyj Issledovatel'skij Yadernyj Univ. MIFI, Moscow (Russian Federation); 200 p; ISBN 978-5-7262-1229-6;
; 2010; p. 103-104; NRNU MEPHI-2010: 13. International Telecommunication Conference of students and young scientists Young people and science; Nauchnaya sessiya NIYaU MIFI-2010. XIII Mezhdunarodnaya telekommunikatsionnaya konferentsiya studentov i molodykh uchenykh Molodezh' i nauka; Moscow (Russian Federation); Nov-Dec 2009; 1 ref., 3 figs.

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[en] A simple pulse low-level discriminator with integral discrimination on the basis of the K521SA3 comparator is described. The discriminator can be used for registration of pulses of >= 0.1 μs duration and amplitude of >= 1 mV. The amplitude of input pulses should not exceed amplitudes of supply voltages
Original Title
Diakriminator na osnove komparatora napryazhenii v yaderno-fizicheskikh issledovaniyakh
Source
For English translation see the journal Instruments and Experimental Techniques (USA).
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[en] The ac and dc errors of cryogenic current comparators with toroidal-shield configurations are reported. Based on these experiments and on theoretical considerations, geometric parameters of the superconducting shields could be determined, which govern the errors. These results may be used for the construction of cryogenic current comparators with predictably low errors. It seems to be possible to decrease the dc error far below the present resolution limit of 3x10-11
Secondary Subject
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Journal Article
Journal
IEEE Transactions on Instrumentation and Measurement; v. IM-23(4); p. 261-263
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Slimani, A; Benslama, A, E-mail: slimaniayoub@yahoo.fr2021
AbstractAbstract
[en] This paper presents a novel approach for designing reversible n-bit comparator based on new quantum gates. Their quantum equivalent implementations are also proposed. The design of comparator circuits is completed by using existing reversible gates and the above new reversible circuits. The comparative results are presented in terms of quantum cost, quantum delay and garbage outputs. (paper)
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Source
10. International Conference on High Energy and Astroparticle Physics; Constantine (Algeria); 18-21 Oct 2019; Available from http://dx.doi.org/10.1088/1742-6596/1766/1/012028; Country of input: International Atomic Energy Agency (IAEA)
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Journal Article
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Conference
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Journal of Physics. Conference Series (Online); ISSN 1742-6596;
; v. 1766(1); [10 p.]

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AbstractAbstract
[en] The typical voltage comparator circuits are considered. Shown that the use of series- parallel connection of cascades improves the accuracy, speed and hardness to single event transient effects. (paper)
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Source
1. international telecommunication conference on advanced micro- and nanoelectronic systems and technologies; Moscow (Russian Federation); 22-23 Dec 2015; Available from http://dx.doi.org/10.1088/1757-899X/151/1/012027; Country of input: International Atomic Energy Agency (IAEA)
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Journal Article
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IOP Conference Series. Materials Science and Engineering (Online); ISSN 1757-899X;
; v. 151(1); [4 p.]

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AbstractAbstract
[en] It has been shown that the use of an additional reference voltage at the input of Schmitt inverting and non-inverting triggers and an analog switch at the output increases the accuracy of the threshold and output voltages, regulates the position of the hysteresis curve on the horizontal axis. Hysteresis does not depend on reference voltage. General formulas have been derived for determining the threshold values for inverting and noninverting triggers, where the two threshold voltages and the two output voltages, depending on the problem setting, can be positive and negative, or unipolar positive or unipolar negative. Those are presented in the form of the sum of stable and unstable components, by increasing the stable component, it is possible to improve the accuracy of threshold voltage values in classical schemes. The necessity of using additional reference voltage is justified. In the proposed scheme, the output parameters of the triggers do not depend on the parameters of the microchip working as a comparator. A guideline of recalculation for increasing the accuracy of threshold voltages using a reference voltage has been developed. A graph is constructed that allows to quickly calculate the relative accuracy increase in the threshold voltages when the reference voltage is applied. This is obtained by increasing the ratio of positive feedback resistances. The reverse problem can also be solved using that graph. New designations of threshold voltages that facilitate the visual understanding of threshold voltage equations have been proposed
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Source
Available from National Academy of Sciences of Armenia, also available online from: https://arar.sci.am/dlibra/publication/387906
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Journal Article
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Izvestiya Akademii Nauk Armyanskoj SSR, Seriya Tekhnicheskikh Nauk; ISSN 0002-306X;
; CODEN IATNAK; v. 75(4); p. 558-570

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AbstractAbstract
[en] Random numbers are of vital importance in fields such as cyptography and scientific simulations. However, it is well known how difficult it is for classical computers to generate random numbers. This is not the case for quantum computers, which are able to genuinely generate random numbers thanks to the property of superposition and their counter-intuitive concept of measurement. However, despite the simplicity of designing a circuit that generates a random number between 0 and 2 - 1 (being N the number of available qubits), designing a quantum circuit to generate a number within a specific interval is far from trivial. This paper proposes a customizable circuit design to generate random numbers. The circuit is non- hardware dependent, it allows fault-tolerance, and it can be used by current quantum devices. Therefore, it is a valuable tool for all those quantum applications and algorithms that need to work with random numbers. Moreover, a comparator circuit has also been designed as part of this work. This comparator is the best currently available in the literature in terms of qubits, T-count, and T-depth. It is therefore a useful tool for any other circuit or algorithm where this operation is needed.
Primary Subject
Source
Available from: http://dx.doi.org/10.1140/epjqt/s40507-023-00174-1; AID: 17
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Journal Article
Journal
EPJ Quantum Technology; ISSN 2196-0763;
; v. 10(1); vp

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