Results 1 - 10 of 3759
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[en] Semiconductor devices are prepared by forming a pattern of resist material on a substrate, using the pattern as a mask to form doping regions and forming the latter by ion implantation. (U.K.)
[en] Operations of arrayed ferroelectric (Fe)-NAND flash memory cells: erase, program and read were demonstrated for the first time using a small cell array of four word lines by two NAND strings. The memory cells and select-gate transistors were all n-channel Pt/SrBi2Ta2O9/Hf-Al-O/Si ferroelectric-gate field effect transistors. The erase was performed by applying 10 µs wide 7 V pulses to n- and p-wells. The program was performed by applying 10 µs wide 7 V pulses to selected word lines. Accumulated read currents of 51 programmed patterns in the Fe-NAND flash memory cell array successfully showed distribution of the two distinguishable '0' and '1' states. The margin between the two states became wider by applying a verification technique in programming a cell out of the eight. Retention times of bit-line currents were obtained over 33 h for both the '0' and '1' states in a program pattern
[en] Si nanonets (SiNN, networks of randomly oriented Si nanowires) and multi-parallel silicon nanowires (MP-SiNW) were integrated into field effect transistor using standard and low cost microelectronic technologies. The SiNN field effect transistors exhibit high initial ON-state current (in the range of 10–7 A), ION/IOFF ratio up to 104 and rather homogeneous transfer characteristics. In contrast, the MP-SiNW ones present smaller modulation between ON and OFF currents, higher IOFF and more scattered electrical characteristics. In view of DNA hybridization detection, a simple and eco-friendly functionalization process with glycidyloxypropyltrimethoxysilane (GOPS) was used to covalently graft single strand DNA probes on both SiNN and MP-SiNW devices. Validated by fluorescence measurement, DNA hybridization leads to a systematic decrease of ON-state current of SiNN devices. In addition, SiNN-based sensors exhibit more homogeneous and reproducible current variation in response to DNA hybridization step as compared to MP-SiNW configuration. This result highlights the better sensing performances of SiNN FETs as compared to MP-SiNW ones and emphasizes the SiNN potential for label-free detection of DNA. (paper)
[en] Field effect transistors have been fabricated on high-purity germanium substrates using low-temperature technology. The aim of this work is to preserve the low density of trapping centers in high-quality starting material by low-temperature (< 3500C) processing. The use of germanium promises to eliminate some of the traps which cause generation-recombination noise in silicon field-effect transistors (FET's) at low temperatures. Typically, the transconductance (g/sub m/) in the germanium FET's is 10 mA/V and the gate leakage can be less than 10-12 A. Present devices exhibit a large 1/f noise component and most of this noise must be eliminated if they are to be competitive with silicon FET's commonly used in high-resolution nuclear spectrometers
[en] The field-effect transistor (FET) noise properties of KP303G, KP307ZH, 2N4416, 2N4392 types are investigated. FETs of first three types are used in the charge-sensitive preamplifier circuits. It is shown that the least contribution to the noise by connecting up a preamplifier to detector has been obtained by using the 2N4392 FET switch. The preamplifier circuit involving such a FET is given. The obtained results can be applied in precision nuclear spectroscopy
[en] The dependence of ballistic electron current on Sn content, sidewall orientations, fin width, and uniaxial stress is theoretically studied for the GeSn fin field-effect transistors. Alloying Sn increases the direct Γ valley occupancy and enhances the injection velocity at virtual source node. (112¯) sidewall gives the highest current enhancement due to the rapidly increasing Γ valley occupancy. The non-parabolicity of the Γ valley affects the occupancy significantly. However, uniaxial tensile stress and the shrinkage of fin width reduce the Γ valley occupancy, and the currents are enhanced by increasing occupancy of specific indirect L valleys with high injection velocity
[en] The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)
[en] A vertical channel field effect transistor on silicon was fabricated by diffusion technique and its electrical characteristics were studied as a function of voltage and temperature. It was found that this transistor has relatively high breakdown voltage of 65 volts for drain source and of 7.5 volts for gate source terminals. (author)
[en] Electrical transport measurements were used to study device behavior that results from the interplay of defects and inadvertent contact variance that develops in as-grown semiconducting single wall carbon nanotube devices with nominally identical Au contacts. The transport measurements reveal that as-grown nanotubes contain defects that limit the performance of field-effect transistors with ohmic contacts. In Schottky-barrier field-effect transistors the device performance is dominated by the Schottky barrier and the nanotube defects have little effect. We also observed strong rectifying behavior attributed to extreme contact asymmetry due to the different nanoscale roughness of the gold contacts formed during nanotube growth.
[en] This paper evaluates the electric current terms from the longitudinal gradient of the longitudinal electric field in Bipolar Field-Effect-Transistors (BiFETs) with a pure base and two MOS gates operating in the unipolar (electron) current mode. These nMOS-BiFETs, known as nMOS-FinFETs, usually have electrically short channels compared with their intrinsic Debye length of about 25 μm at room temperatures. These longitudinal electric current terms are important short-channel current components, which have been neglected in the computation of the long-channel electrical characteristics. This paper shows that the long-channel electrical characteristics are substantially modified by the longitudinal electrical current terms when the physical channel length is less than 100 nm.