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AbstractAbstract
[en] A memory is a physical system for transferring information form one moment in time to another, where that information concerns something external to the system itself. This paper argues on information-theoretic and statistical mechanical grounds that useful memories must be of one of two types, exemplified by memory in abstract computer programs and by memory in photographs. Photograph-type memories work by exploring a collapse of state space flow to an attractor state. (This attractor state is the open-quotes initializedclose quotes state of the memory.) The central assumption of the theory of reversible computation tells us that in any such collapsing, regardless of whether the collapsing must increase in entropy of the system. In concert with the second law, this establishes the logical necessity of the empirical observation that photograph-type memories are temporally asymmetric (they can tell us about the past but not about the future). Under the assumption that human memory is a photograph-type memory, this result also explains why we humans can remember only our past and not our future. In contrast to photo-graph-type memories, computer-type memories do not require any initialization, and therefore are not directly affected by the second law. As a result, computer memories can be of the future as easily as of the past, even if the program running on the computer is logically irreversible. This is entirely in accord with the well-known temporal reversibility of the process of computation. This paper ends by arguing that the asymmetry of the psychological arrow of time is a direct consequence of the asymmetry of human memory. With the rest of this paper, this explains, explicitly and rigorously, why the psychological and thermodynamic arrows of time are correlated with one another. 24 refs
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Jiang, Dandan; Huo, Zongliang; Zhang, Manhong; Jin, Lin; Bai, Jie; Yu, Zhaoan; Liu, Jing; Wang, Qin; Yang, Xiaonan; Wang, Yong; Liu, Ming; Zhang, Bo; Chen, Junning, E-mail: liuming@ime.ac.cn2011
AbstractAbstract
[en] A novel drain-junction-assisted hot electron programming scheme has been proposed for Si nanocrystal memory devices. Different from the conventional channel hot electron (CHE) injection, two electron injection paths are responsible for the proposed scheme. Experimental results show that the new scheme has a nearly 1 V memory window increase and almost 300 times faster programming speed rather than the conventional CHE method. Meanwhile, improved data retention and endurance characteristics have also been achieved with the enlarged memory window, which is mainly due to less tunnel oxide degradation during the program/erase cycling. Therefore, the new scheme is shown to be more promising for Si nanocrystal memory application
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S0268-1242(11)99524-8; Available from http://dx.doi.org/10.1088/0268-1242/26/11/115008; Country of input: International Atomic Energy Agency (IAEA)
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Mackowiak, E.; Le Goascoz, V.
CEA Centre d'Etudes Nucleaires de Grenoble, 38 (France). Lab. d'Electronique et de Technologie de l'Informatique1976
CEA Centre d'Etudes Nucleaires de Grenoble, 38 (France). Lab. d'Electronique et de Technologie de l'Informatique1976
AbstractAbstract
[en] A 1024 bits fully decoded electrically writable and erasable non volatile ROM is described. Memory cells and peripheral circuits are made using P channel silicon on sapphire enhancement depletion technology
[fr]
On decrit une memoire morte non remanente de 1024 bits, entierement decodee, a enregistrement et effacement electrique. Cellules memoire et circuits peripheriques sont fabriques par technologie de canal P silicium/saphir a enrichissement/appauvrissementSource
23 Mar 1976; 14 p; Seminar on programmable integrated circuits, technology devices, circuit and system aspects; Berchtesgaden, F.R. Germany; 8 Oct 1975; CEA-LETI-MEA--1147
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Lupashina, I.S.; Makarov, V.A.; Popova, I.V.; Sokolov, S.N.; Kharybina, L.D.
Gosudarstvennyj Komitet po Ispol'zovaniyu Atomnoj Ehnergii SSSR, Serpukhov. Inst. Fiziki Vysokikh Ehnergij1972
Gosudarstvennyj Komitet po Ispol'zovaniyu Atomnoj Ehnergii SSSR, Serpukhov. Inst. Fiziki Vysokikh Ehnergij1972
AbstractAbstract
No abstract available
Original Title
Translyatsiya s fortrana na mashinakh s malym obemom operativnoj pamyati
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1972; 28 p; 4 refs.
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Gerardin, S.; Bagatin, M.; Paccagnella, A.; Visconti, A.; Bonanomi, M.
Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Funding organisation: USDOE National Nuclear Security Administration (NNSA) (United States)2017
Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Funding organisation: USDOE National Nuclear Security Administration (NNSA) (United States)2017
AbstractAbstract
[en] We discuss upsets in erased floating gate cells, due to large threshold voltage shifts, using statistical distributions collected on a large number of memory cells. The spread in the neutral threshold voltage appears to be too low to quantitatively explain the experimental observations in terms of simple charge loss, at least in SLC devices. The possibility that memories exposed to high energy protons and heavy ions exhibit negative charge transfer between programmed and erased cells is investigated, although the analysis does not provide conclusive support to this hypothesis.
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SAND--2017-0103J; OSTIID--1339278; AC04-94AL85000; Available from http://www.osti.gov/pages/biblio/1339278; DOE Accepted Manuscript full text, or the publishers Best Available Version will be available free of charge after the embargo period
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IEEE Transactions on Nuclear Science; ISSN 0018-9499;
; v. 64(1); p. 421-426

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Li, Qi; Zhang, Yu; Zou, Xingqi; Huo, Zongliang; Gao, Jing; Yang, Chuan; Ding, Lei; Wu, Zhipeng; Li, Na; Zhang, Sen, E-mail: huozongliang@ime.ac.cn2019
AbstractAbstract
[en] In this study, the wafer warpage resulting from common source line tungsten (CSL W) is investigated in 3D NAND flash memory. It is found that the warpage is related to the annealing conditions after CSL W deposition, and it reduces exponentially with increasing annealing temperature or linearly with increasing annealing time. This result shows that the effect of annealing temperature on warpage is greater than that of time. Consequently, spike annealing with a low thermal budget is proposed to achieve the desired reduction of warpage as long as the annealing temperature is adequate. This work provides an effective approach to solve the wafer warpage problem in 3D NAND flash memory manufacturing. (letter)
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Available from http://dx.doi.org/10.1088/1361-6641/aafccd; Country of input: International Atomic Energy Agency (IAEA)
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AbstractAbstract
[en] After some 20 years of valiant service providing the mainstay computing services, machines based on a mainframe architecture are beginning to show signs of age. With the advent of personal computers, less expensive hardware and increased networking, mainframe systems providing a range of services for hundreds, even thousands, of users are being discarded in favour of distributed computing solutions. During these twenty years, the traditional mainframe provided the inherent integration or 'glue' for major computing environments. This was particularly the case with high energy physics laboratories, handling enormous quantities of data. At CERN, the VM system (CERNVM) was, and still is, an integral part of CERN's day-to-day working environment, with some 15,000 tape mounts per week and a thousand logged-on users at peak periods
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INIS-XC--16A0047; Also available on-line: http://cds.cern.ch/record/1732264/files/vol34-issue3-p016-e.pdf; Country of input: International Atomic Energy Agency (IAEA)
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Fantini, Paolo, E-mail: pfantini@micron.com2020
AbstractAbstract
[en] 50 years from the discovery of the phase change memory (PCM) is a sufficient time frame to see the steps of this technology with a historical perspective. So, a historical review of the PCM from its first proof of concept up to the most recent achievements of the research is provided. A parallel historical glance to the product development is also proposed as background to lead the discussion on the opportunities that PCM can bring in the actual scenario of memory eco-system. Against the dream of PCM as universal memory, this paper offers guidelines for PCM applications in the widespread landscape separating the short-time memory (like DRAM, short both for latency and retention) with respect to the long-time memory (like NAND, long both for latency and retention), thus contributing to the heterogeneous memory eco-system. In particular, hints on embedded PCM are considered, while more extensive discussion is reserved for PCM in the storage class memory arena and in the neuromorphic and in-memory computing applications. (topical review)
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Available from http://dx.doi.org/10.1088/1361-6463/ab83ba; Country of input: International Atomic Energy Agency (IAEA)
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Liu, Yuan-Guang; Chen, Yi-Feng; Cai, Dao-Lin; Lu, Yao-Yao; Wu, Lei; Yan, Shuai; Li, Yang; Lu, Jun-Jie; Yu, Li; Song, Zhi-Tang, E-mail: lyguang@mail.sim.ac.cn2019
AbstractAbstract
[en] Multilevel-cell (MLC) phase change memory (PCM) usually evaluated in the program method, delay or write energy while the endurance characteristic has not been focused on. In this paper, we exploit a staircase-up program and verify method in the current-driven 4 Mb PCM chip to achieve MLC storage. The direct results of the change in the R–I characteristic and resistance distribution during the cycles are displayed. According to the measurement, the PCM device shows four separable resistance levels after 106 operation cycles with a decreasing resistance of full-crystalline state. And the resistance drift and read disturb which affect the cell reliability also are briefly tested. The MLC device shows a good performance where four resistance levels can be separated well after 1000 s and the read endurance under 0.3 V is retained up to 109 cycles. (paper)
Source
Available from http://dx.doi.org/10.1088/1361-6641/ab3c93; Country of input: International Atomic Energy Agency (IAEA)
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Marino, D.; Mirizzi, N.; Stella, R.; Visaggio, G.
Proceedings 2nd Ispra nuclear electronics symposium. Stresa, Italy, May 20-23, 19751975
Proceedings 2nd Ispra nuclear electronics symposium. Stresa, Italy, May 20-23, 19751975
AbstractAbstract
[en] A quantitative comparison between zone memories, pseudorandom addressed memories and an alternative special purpose memory (spread zone memory) in which the distance between any two transformed descriptors, at first adjacent, is independent of the descriptors pair and results the maximum one is presented. This memory has not been particularly considered at present in spite of its efficiency and its simple implementation
Source
Commission of the European Communities, Luxembourg; p. 253-255; Jun 1975; 2. Ispra nuclear electronics symposium; Stresa, Italy; 20 May 1975
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